The present invention generally relates to ferroelectric memory devices, and more particularly to a ferroelectric memory device of so-called MFS (metal-ferroelectric-semiconductor) type or MFIS (metal-ferroelectric-insulation-semiconductor) type, in which a ferroelectric film is provided on a channel region of a memory cell transistor in the state that a gate electrode of the memory cell transistor is provided on the ferroelectric film. Further, the present invention relates to fabrication process and driving method of such a ferroelectric memory device.
In various portable electronic apparatuses including cellular phones, further improvement of performance has become difficult nowadays because of various problems such as limitations imposed on the continual running time of the apparatus due to insufficient battery capacity, limitations imposed on the clock frequency, limitations imposed on the memory capacity, and the like.
Because of this, attempts are being made to reduce the electric power consumption of such an electronic apparatus by increasing the capacity of the power supply by way of using fuel cells or by introducing power management architecture. Nevertheless, performance of portable electronic apparatuses is still very much inferior to the electronic apparatuses operated with AC power supply. It is now recognized that mere improvement of power supply or power management should be insufficient for increasing the performance of portable electronic apparatuses to the degree comparable to the electronic apparatuses operated with AC power supply.
On the other hand, with electronic apparatuses that operates with an AC power supply, there is a problem that data is lost when the power is shut down, and thus, it has been necessary to store the data in a hard disk device or flash memory device, while such a procedure requires time for starting up and shutdown of the system, resulting in poor operability and increases electric power consumption. Particularly, when unexpected power failure is caused with electronic apparatuses operating with an AC power supply, there is caused a major damage of vanishing of data.
Such problems of vanishing of data with power shutdown, or the problem of needing long time for starting up or shutting down an electron apparatus, arise from the fact that conventional electronic apparatuses have used DRAMs or SRAMs, which are volatile in nature, for the semiconductor random access memory devices. Thus, investigations are being made for decreasing the time needed for starting up or shutting down an electronic apparatus, decreasing the electric power consumption in a standby state, and providing protection to vanishing of data, by using a non-volatile semiconductor memory for the main memory of electronic apparatuses.
While there are various semiconductor non-volatile memory devices, a ferroelectric memory (FeRAM) is thought as being the most promising device at the present juncture, in view of its capability of performing reading and writing operations at high speed. FeRAM is already used with IC cards and other applications.
However, currently available ferroelectric memory devices have the memory capacity of only 1M bits or less at the present moment, and the use of a ferroelectric memory as the main memory of portable electronic apparatuses or personal computers has not been achieved yet. Thus, increase of capacity of ferroelectric memory devices is an urgent issue in both portable electronic devices and electronic devices operated with AC power supply.
Under such circumstances, intensive efforts are being made for developing a single-transistor FeRAM having the feature of small memory area and large memory capacitance, wherein a single-transistor FeRAM is a ferroelectric memory device that provides a ferroelectric film in a gate electrode of a MOS transistor and holds information in the form of polarization of the ferroelectric film. At the time of reading, the device utilizes the change of threshold characteristics caused by the polarization of the ferroelectric film.
FIG. 1 shows the construction of a single-transistor FeRAM 40 of MFIS structure. With regard to the single-transistor FeRAM, reference should be made to Patent Reference 1 through Patent Reference 3.
Referring to FIG. 1, the FeRAM 40 is formed on an n-type silicon substrate 41 having a device region 41A defined by a device isolation film 42, wherein a channel region is formed in the device region 41A between a p-type source region 43 and a p-type drain region 44. Further, a ferroelectric film 46 of PZT, or the like, is formed on the channel region via a buffer insulation film 45 of HfO2, or the like, and a gate electrode 47 of Pt, for example, is formed further thereon.
With such a ferroelectric memory device 40, data is written into the ferroelectric film 46 in the form of polarization as shown in FIGS. 2A and 2B, while this is made by applying a positive or negative writing voltage to the gate electrode 47. At the time of reading, existence of the electric charges induced in the channel region by the polarization of the ferroelectric film 46 is detected in the form of change of the drain current as shown in FIG. 2C. Thus, with the ferroelectric memory 40, data is read out by reading the polarization of ferroelectric film 4.
For example, the hysteresis curve shown in FIG. 2C with continuous line corresponds to the state of FIG. 2A, wherein a large drain current is obtained when a read gate voltage VR is applied to a gate electrode 47 in the state of FIG. 2A. On the other hand, the hysteresis curve shown in FIG. 2C with a broken line corresponds to the state of FIG. 2B, wherein it will be noted that a small drain current is obtained when the read voltage VR is applied to the gate electrode 47.
In FIG. 2C, the area defined by the hysteresis curve of low threshold state and the hysteresis curve of high threshold state is called “memory window”. The larger the memory window, the more stable reading becomes possible. Further, the ratio of the drain current between the low threshold state and the high threshold state is called ON/OFF ratio. The larger the ON/OFF ratio, the more stable reading becomes possible.
It should be noted that the history of such a single-transistor FeRAM is very old and can be traced back up to 1957 (Reference should be made to Patent Reference 4).